Technology

Technical Resources

The latest presentations and papers highlighting Weebit’s ReRAM/RRAM technology developments

 

White Paper: Design Considerations for Embedded NVM in High-Radiation Applications

ReRAM: From Concept to Product

An overview of how a memory product moves from design to market (Non-Volatile Memory Technology Symposium [NVMTS] 2022 select, redacted slides)

How an Embedded Non-Volatile Memory IP Can Be a Differentiator

How ReRAM can differentiate SoCs for a broad range of applications – from PMICs and analog ICs to automotive, security, and neuromorphic designs (IP-SOC Conference 2022)

Fully Binarized, Parallel, RRAM Based Computing Primitive for In Memory Similarity Search

A fully-binarized XOR based IMSS (In-Memory Similarity Search) using RRAM (Resistive Random Access Memory) arrays (IEEE Transactions on Circuits and Systems II)

Weebit ReRAM: Neuromorphic Demo

A bio-inspired neuromorphic computing demonstration using Weebit’s RRAM, developed by CEA-Leti and Weebit Nano

Weebit ReRAM Technology Demo

A demonstration of the real-world silicon-based NVM capability of Weebit’s RRAM, developed by CEA-Leti and Weebit Nano

High temperature stability embedded ReRAM for 2x nm node and beyond

Details of the performance and reliability of Weebit ReRAM integrated in 28nm, highlighting the technology’s intrinsic high reliability (Weebit and CEA-Leti, IMW 2022)

Combining accuracy and plasticity in convolutional neural networks with ReRAM

Proposing a hardware solution that combines the benefits of artificial and spiking neural networks (IEEE Journal on Exploratory Solid-State Computational Devices and Circuits)

A Comprehensive Oxide-Based ReRAM TCAD Model with Experimental Verification

Detailing new predictive and physics-based TCAD simulations for modeling Oxide-based ReRAM (Weebit and Silvaco, International Memory Workshop 2021)

Fully-Integrated Spiking Neural Network (SNN) using RRAM as Synaptic Device

The first complete integration of a fully connected SNN with synaptic weights implemented using SiOx based resistive memories (Weebit and CEA-Leti, AICAS 2020)