ReRAM Memory Module Technology
Weebit ReRAM technology is available to customers in the form of a memory module, which is a critical component when embedding a memory array in a System-on-Chip (SoC). A memory module acts as the interface between the memory array and the rest of the system and includes the logic that controls the way the array is accessed.
We implement ReRAM (RRAM) modules in an intelligent way, with unique patent-pending analog and digital smart circuitry that significantly enhances the array’s technical parameters including speed, retention, and endurance.
ReRAM Module Tightly Coupled with Bitcell Technology
An efficient ReRAM module must be designed and developed in close relation with the memory bitcell so it can optimize the functionality of the memory array. Due to the inherent variability of ReRAM (RRAM) cells, specially developed algorithms are key to the process of programming and erasing cells. These algorithms must be delicately balanced between programming time (the quicker, the better), current (the lower, the better), and cell endurance (allowing each individual cell to operate for as many program/erase [P/E] cycles as possible). Voltage levels, P/E pulse widths and the number of such pulses must be optimized to work with a given bitcell technology.
When reading any given bit, the data must be verified against other assistive information to make sure there are no read errors that could impair overall system performance.
Voltage and current levels must be carefully examined throughout the memory module for any operation – including read, program and erase – to keep power consumption to a minimum and ensure the robustness and reliability of the memory array.
Our ReRAM module was designed in a very modular and configurable manner so it can be used as a foundation for our future ReRAM compiler. The ReRAM compiler will enable customers to automatically reconfigure the design according to their specific requirements without going through exhaustive manual design and fab qualification processes.