22
Sep, 22
22 Sep, 22

The Importance of Character Development
Semiconductor Characterization Explained

“He’s the guy who’s been all around the world. … he is an archeologist and an anthropologist. A Ph.D. … he’s also a sort of rough and tumble guy … a sort of expert in the occult… he not only is not afraid to stand up against any man, but he’s also not afraid to stand up against the unknown. … He should be able to talk his way out of things. … The guy should be a great gambler too. … The doctor with the bullwhip. … A soldier of fortune in the thirties…”

One of the most important parts of a good screenplay, novel or other type of story is character development. If you’ve seen the Indiana Jones movies, you’ll probably recognize the character described in the quote excerpts above, which are from a long discussion between George Lucas, Steven Spielberg and Larry Kasden as they initially developed the Indiana Jones character in January 1978. A transcript of that discussion is available (registration is required) that shows just how much thought went into creating the personality, back story, motivations, and other traits of the character.

This description was not part of the screenplay itself (which is also available at the above link), but it represents some of the critical preliminary work done to make the character come to life. Such a description is critical in development of a realistic screenplay (and ultimately a movie) because it provides guidelines for the hero’s behavior in any possible situation, ensuring consistency and resulting in a believable character.

Indiana Jones image courtesy of http://www.theraider.net

Similarly, although using a much more rigorous and scientific process), semiconductor devices must be characterized. For a semiconductor device, ‘characterization’ is the testing process which assesses exactly what the chip looks like and how it functions under any given condition.

 Semiconductor Device Characterization

The semiconductor characterization process is used to develop the nominal and maximal boundaries of a device’s behavior across a range of conditions. It tests the assumptions of the initial device definition and specification while making various tweaks and optimizations. Specifically for NVM devices, the characterization process also involves employing smart algorithms to ensure the spec boundaries. Similar to the specification we receive when we buy a car or other complex product, the end result is a final specification that enables customers to understand the device’s expected behavior and limitations so they know what they can and can’t do with it when they design their application. The customer will use the boundaries set through the characterization process when designing their own product or application.

Characterization must be done on every new semiconductor design when its first silicon units arrive after fabrication. The process focuses on performing very accurate electrical measurements to gather as much data as possible.

In a previous article, we discussed qualification, a process focused on stress testing samples from multiple production lots to ensure the technology is robust over a product’s expected life span. In contrast, the characterization of a device is used to:

  • Assess functionality for parameters such as yield, performance and stability
  • Determine optimal operating conditions – looking at the immunity to process, voltage and temperature variations
  • Discover potential problems and sensitivities – to correct any process errors
  • Verify the final specification limits and production test program – used for further testing and reliability qualification

While characterization and qualification are different processes, they happen in tandem and data feeds between the two. For example, when we find optimal or boundary conditions through characterization, we apply those conditions using various stresses during qualification.

 Answering Key Questions

As we go through the characterization process with our ReRAM module, we are aiming to address a range of key questions. While a technology like ReRAM starts with few single cells, we want to know how those cells will behave if we put millions, tens of millions or more of them together on the same chip. What does their distribution look like? What is their cell-to-cell variability? For example, in the same array, do we have cells that can be written faster than the rest of the cells, while other cells are slower?

Beyond the chip, we need to understand how the on-chip ReRAM cells behave across an entire wafer. What is the die-to-die variability? Is the performance uniform? What is the die yield (percentage of good dies per wafer)? Then we look at the variance between different wafers and different production lots. Does each lot have different results? What is the lot-to-lot variability? Is there any sensitivity to process variations?


The Characterization Process

To answer these critical questions, we begin by building a system to cover all operating conditions. The main challenge with characterizing a chip based on a new technology like ReRAM is to create the specific methodologies that suit that technology. We start with methodologies originally developed for other NVM technologies such as flash memory, and then we tune those for our technology. For the tests, we use an evaluation board designed specifically to test and operate the device, as well as a production tester (Automated Testing Equipment or ATE).

Before jumping in, the first thing we must do is verify that there aren’t any process issues that impact the wafers. This is especially important for new technologies. Once the technology is verified, we then move on to testing the basic functionality of the chip. In the case of ReRAM, this means measuring the initial characteristics of the memory cells such as initial resistance. We must also make sure we can access each of the memory cells in every chip, and that we can write, read and erase each cell multiple times. We also confirm that the cells behave according to expectations in terms of electric current and voltage levels as well as timing.

We check all these parameters using code and test programs that automatically perform operations on the ReRAM cells/arrays. The tests use various patterns of zeros and ones to ensure the device can correctly store and retain the information, and we vary the data patterns to make sure each cell can handle any combinations of data types.

After testing several units, we move on to testing a larger amount of dies and collect statistics based on a broad range of electrical and physical conditions. This includes environmental conditions such as temperature, since we want to make sure customers can use the device reliably in products that are used not only at room temperatures but also in extremes – whether it be outdoors in the desert or in the arctic tundra.

 Characterizing the Weebit ReRAM Module

Weebit is currently characterizing our embedded ReRAM module developed with our partner CEA-Leti. The module includes the ReRAM array as well as control logic, decoders, IOs (Input/Output communication elements) and error correcting code (ECC) as well as patent-pending analog and digital smart circuitry, implemented 130nm. This process is happening concurrently with the module’s qualification (you can read here about our initial qualification results here).

Our team of product and test engineers are working alongside engineers from CEA-Leti’s LIST design team in a new lab in Israel that we established for this purpose. We expect to have final results before the end of 2022.

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