News

Media Coverage

12
Sep, 21

SkyWater foundry to take Weebit ReRAM to volume

Foundry and process technology developer SkyWater Technology plans to offer ReRAM technology from Weebit Nano embedded in a 130nm CMOS process.

10
Sep, 21

Nothing semi about Weebit deal with semiconductor giant SkyWater Tech

Coby Hanoch, Weebit Nano CEO joins Annette for a quick tour of a the Aussie-listed tech play’s maiden commercial deal – and it’s a big one – with US semiconductor foundry SkyWater Technologies

09
Sep, 21

Weebit makes whopping big stride towards ReRAM production

Weebit Nano has signed a deal with US-based Skywater to bring its technology into volume production

22
Aug, 21

EDACafe Bunker Broadcast

Interview with Coby Hanoch, Weebit CEO

15
Aug, 21

Is It Embedded ReRAM’s Time to Shine?

by Max Maxfield

13
Aug, 21

Weebit-Nano’s First Steps on the NV Memory Road

In this post contributor Ron Neale analyzes Weebit Nano’s recently-announced memory array, based on an Ovonic Threshold Switch selector developed by CEA-Leti in France.

15
Jul, 21

Weebit completes design and tape-out of embedded ReRAM module

Weebit Nano, a developer of next-generation semiconductor memory technologies, has completed the design and verification stages of its embedded ReRAM module.

15
Jul, 21

Weebit Nano tapes out test chip

Weebit Nano has completed the design and verification stages of its embedded ReRAM module, and taped-out a test-chip that integrates this module.

01
Jul, 21

Seagate Search Partnership, SoftIron Task Specific Storage And Weebit Nano 3D RRAM Plans

Weebit Nano, an emerging memory startup announced that it has integrated an oxide-based ReRAM (OxRAM) memory cell with an ovonic threshold switching (OTS) selector, created with its development partner, CEA-Leti.

01
Jul, 21

Weebit Nano Successfully Demonstrates Integration of Selector with ReRAM Cell for the Stand-alone Memory Market

This achievement is a significant step towards broadening Weebit’s target market beyond embedded non-volatile memory (NVM) to include discrete memory technology, and will enable the implementation of 3D memory stacking and crossbar architectures in future developments.